TTL and RS-644 (LVDS) timing input-output unit. 4 timing outputs,
4 time measurement inputs, 8 digital inputs and 8 digital outputs.
Computer control through serial line. This device is designed to generate
sequences of clock signals and measure timing of pulses relative to a common start trigger.
- 4 programmable timing inputs
- 4 programmable timing outputs
- 8 digital I/O lines
- LVDS and TTL signal levels
- 10 internal programmable timersí
- 10 MHz maximal clock ferquency
- Optically isolated trigger/clock subsystem
- 8 BNC and 2×9 D-sub connectors
- Serial line communication to PC